Advanced PC Architecture
by Buchanan, William; Wilson, AustinRent Book
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Summary
Table of Contents
| Preface | p. vii |
| Introduction | p. 1 |
| Pre-PC Development | p. 1 |
| 8008/8080/8085 | p. 7 |
| 8086/8088 | p. 13 |
| 80186/80188 | p. 19 |
| 80286 | p. 20 |
| Post-PC Development | p. 21 |
| Top 15 Achievers and Under-achievers | p. 39 |
| History of Computer Systems | p. 44 |
| Exercises | p. 46 |
| DEC | p. 52 |
| Note from the Author | p. 54 |
| PC Basics | p. 56 |
| PC Systems | p. 56 |
| Practical PC System | p. 57 |
| Buses | p. 58 |
| Interrupts | p. 70 |
| Interfacing | p. 79 |
| Exercises | p. 84 |
| Note from the Author | p. 86 |
| Introduction to Intel Processors | p. 87 |
| Introduction | p. 87 |
| Intel Range | p. 88 |
| Memory Addressing | p. 93 |
| 8088 Microprocessor | p. 95 |
| View Inside the Processor | p. 100 |
| Exercises | p. 101 |
| 8086 Basics | p. 103 |
| Introduction | p. 103 |
| Assembly Language Elements | p. 104 |
| Timing | p. 111 |
| Moving Data Around in Memory | p. 113 |
| Equates | p. 114 |
| Exercises | p. 114 |
| Data Definition | p. 117 |
| Assembler Directives | p. 118 |
| 8086 Reference | p. 119 |
| 80486 | p. 124 |
| Introduction | p. 124 |
| 80486 Pin Out | p. 124 |
| 80386/80486 Registers | p. 128 |
| Memory Cache | p. 128 |
| Exercises | p. 138 |
| 80486 Microprocessor Signals | p. 138 |
| Bus Cycles, Bus Controller and Direct Memory Access | p. 151 |
| Introduction | p. 151 |
| Bus Cycles | p. 151 |
| Bus Controller | p. 157 |
| Direct Memory Access | p. 165 |
| Exercises | p. 170 |
| CMOS, Memory and I/O | p. 171 |
| CMOS | p. 171 |
| Memory | p. 173 |
| Input/output Memory | p. 181 |
| Port B | p. 183 |
| Exercises | p. 183 |
| I/O Memory Map | p. 184 |
| Background on Memory | p. 186 |
| UART and PIC | p. 191 |
| Introduction | p. 191 |
| Universal asynchronous receiver transmitter (8250) | p. 191 |
| Programmable Interrupt Controller (8259) | p. 199 |
| Exercises | p. 203 |
| PPI and PTC | p. 206 |
| Introduction | p. 206 |
| Programmable Peripheral Interface (8255) | p. 206 |
| Programmable Timer Controller (8254) | p. 213 |
| Timers and the PC | p. 221 |
| Exercises | p. 223 |
| Introduction to the Pentium | p. 226 |
| Introduction | p. 226 |
| Intel Processor Development | p. 226 |
| Terminology | p. 228 |
| Pentium II and Pentium Pro | p. 229 |
| System Overview | p. 230 |
| Pentium Details | p. 234 |
| Exercises | p. 242 |
| Transaction Phase Signals | p. 247 |
| Introduction | p. 247 |
| Transaction Examples | p. 256 |
| Additional Pentium Pro Signals | p. 263 |
| Exercises | p. 268 |
| Memory | p. 270 |
| Introduction | p. 270 |
| Memory Basics | p. 270 |
| Memory Subsystem | p. 282 |
| Memory Errors | p. 286 |
| Exercises | p. 291 |
| Additional diagrams | p. 292 |
| MMX Technology | p. 294 |
| Introduction | p. 294 |
| PII Technology Profile | p. 294 |
| MMX Technology | p. 295 |
| Instruction Execution | p. 305 |
| Introduction | p. 305 |
| Typical Processor Approach to Instruction Execution | p. 306 |
| PII Approach to Instruction Execution | p. 307 |
| PII Processor Block Diagram | p. 308 |
| PII Dynamic Execution Implementation | p. 309 |
| PII Bus Features | p. 310 |
| PII/III Bus Transactions | p. 312 |
| Transaction Types | p. 315 |
| Transaction Phases | p. 316 |
| Processor Bus Transaction Signals Diagram | p. 317 |
| Exercises | p. 326 |
| SC242 Signals | p. 327 |
| Introduction | p. 327 |
| Additional SC242 signals | p. 330 |
| Exercises | p. 335 |
| Processor Developments | p. 336 |
| Introduction | p. 336 |
| Other Processors | p. 340 |
| x84-64 Architecture | p. 342 |
| Interface Buses | p. 343 |
| Introduction | p. 343 |
| PC Bus | p. 343 |
| ISA Bus | p. 345 |
| Other Legacy Buses | p. 349 |
| Summary of Interface Bus Types | p. 350 |
| Comparison of Different Interface Bus Types | p. 353 |
| Exercises | p. 354 |
| The Fall of the MCA Bus | p. 355 |
| Note from the Author | p. 356 |
| PCI Bus | p. 361 |
| Introduction | p. 361 |
| PCI Operation | p. 363 |
| Bus Arbitration | p. 367 |
| PCI I/O Write Data Cycle Timing Diagram Section | p. 369 |
| Other PCI Pins | p. 377 |
| Configuration Address Space | p. 378 |
| I/O Addressing | p. 380 |
| Bus Cycles | p. 384 |
| PCI Faults | p. 388 |
| Interrupt Handling | p. 390 |
| Exercises | p. 391 |
| PCI Functional Signal Groups | p. 392 |
| Example Manufacturer and Plug-and-play IDs | p. 394 |
| Note from the Author | p. 395 |
| IDE | p. 396 |
| Introduction | p. 396 |
| Tracks and Sectors | p. 396 |
| Fixed Disks | p. 397 |
| Drive Specifications | p. 398 |
| Hard Disk and CD-ROM Interfaces | p. 398 |
| IDE Interface | p. 400 |
| IDE Communication | p. 402 |
| Optical Storage | p. 408 |
| Magnetic Tape | p. 412 |
| File Systems | p. 413 |
| Exercises | p. 415 |
| Note from the Author | p. 416 |
| SCSI | p. 418 |
| Introduction | p. 418 |
| SCSI Types | p. 418 |
| SCSI Interface | p. 419 |
| SCSI Operation | p. 422 |
| Message System Description | p. 424 |
| SCSI Commands | p. 426 |
| Status | p. 429 |
| Exercises | p. 430 |
| Note from the Author | p. 430 |
| PCMCIA (PC Card) | p. 432 |
| Introduction | p. 432 |
| PCMCIA Registers | p. 433 |
| Exercises | p. 437 |
| Additional: PCMCIA Types and Pin Connections | p. 437 |
| Note from the Author | p. 438 |
| USB and Firewire | p. 439 |
| Introduction | p. 439 |
| USB | p. 440 |
| Firewire | p. 445 |
| Exercises | p. 448 |
| Note from the Author | p. 449 |
| Games Port, Keyboard and Mouse | p. 450 |
| Introduction | p. 450 |
| Games Port | p. 450 |
| Mouse | p. 453 |
| Keyboard | p. 455 |
| Mouse and Keyboard Interface | p. 458 |
| Exercises | p. 459 |
| Note from the Author | p. 460 |
| AGP | p. 461 |
| Introduction | p. 461 |
| PCI and AGP | p. 462 |
| Bus Transactions | p. 463 |
| Pin Description | p. 463 |
| AGP Connections | p. 466 |
| AGP Master Configuration | p. 466 |
| Bus Commands | p. 467 |
| Addressing Modes and Bus Operations | p. 468 |
| Register Description | p. 468 |
| Exercises | p. 472 |
| Note from the Author | p. 473 |
| RS-232 | p. 474 |
| Introduction | p. 474 |
| Electrical Characteristics and Connectors | p. 474 |
| Communications Between Two Nodes | p. 476 |
| Programming RS-232 | p. 480 |
| RS-232 Programs | p. 480 |
| Interface to the Motherboard | p. 483 |
| Exercises | p. 483 |
| Note from the Author | p. 488 |
| Parallel Port | p. 489 |
| Introduction | p. 489 |
| Data Handshaking | p. 489 |
| I/O Addressing | p. 492 |
| Interrupt-driven Parallel Port | p. 497 |
| ECP/EPP Mode | p. 501 |
| Interface to the Motherboard | p. 510 |
| Exercises | p. 511 |
| Note from the Author | p. 514 |
| PC Motherboards | p. 516 |
| Introduction | p. 516 |
| Intel HX | p. 517 |
| TX Motherboard | p. 527 |
| 450NX PCIset | p. 531 |
| 450KX and 450GX PCISET | p. 533 |
| Exercises | p. 534 |
| Interface to Flash | p. 535 |
| Note from the Author | p. 535 |
| Hub-based Architecture | p. 537 |
| Introduction | p. 537 |
| 820 Chipset | p. 539 |
| 840 Chipset | p. 546 |
| 810E Chipset | p. 550 |
| Exercises | p. 551 |
| Appendices | p. 553 |
| SIMM/DIMM Pin Connections | p. 553 |
| Slot 1/SC242 Connections | p. 560 |
| Quick Reference | p. 562 |
| ASCII | p. 565 |
| Additional WWW material | p. 567 |
| Index | p. 568 |
| Table of Contents provided by Syndetics. All Rights Reserved. |
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